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Benchmarks

Wall-clock simulation time for PRISM-Q on a fixed circuit suite built from the prism_q::circuits generators, pushed toward this machine's limits. Every number is reproducible with the command at the bottom of this page.

Setup

  • Date: 2026-05-29
  • CPU: Intel64 Family 6 Model 94 Stepping 3, GenuineIntel
  • Threads available: 8
  • PRISM-Q version: 0.16.0

Methodology

  • Metric: median wall-clock over repeated runs after warmup, lower is better.
  • Timed region is simulation only. Circuit construction happens once per circuit outside the timer.
  • Timings use the full simulate().run() path, including the fusion pass and probability extraction.
  • auto lets backend dispatch choose a specialized backend per circuit. The dense families (QFT, HEA, QV) are bounded by the statevector memory cap; GHZ is Clifford and runs into the thousands of qubits on the stabilizer backend. QV uses square depth, so its gate count grows with the qubit count and it is compute-bound earlier than the fixed-depth families.

GHZ

Qubitsauto
2437.9 us
2879.2 us
256825.8 us
10242.73 ms
409635.97 ms

QFT

Qubitsauto
16715.0 us
2025.34 ms
24639.72 ms
263.786 s
2817.727 s

HEA

Qubitsauto
163.49 ms
2063.81 ms
241.588 s
267.330 s
2833.303 s

QV

Qubitsauto
167.73 ms
20190.02 ms
245.811 s

Reproducing

cargo run --release --features parallel --example bench_suite

Times PRISM-Q on every circuit in the suite and rewrites this page.